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january 2016 docid028068 rev 2 1 / 14 this is information on a product in full production . www.st.com STL8N6LF6AG automotive - grade n - channel 60 v, 21 m typ., 32 a stripfet? f6 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d p tot STL8N6LF6AG 60 v 27 m 32 a 55 w ? designed for automotive applications and aec - q101 qualified ? very low on - resistance ? very low gate charge ? high avalanche ruggedness ? low gate drive power loss ? wettabl e flank package applications ? switching applications description this device is an n - channel power mosfet developed using the stripfet? f6 technology with a new trench gate structure. the resulting power mosfet exhibits very low r ds(on) in all packages. table 1: device summary order code marking package packing STL8N6LF6AG 8n6lf6 powerflat? 5x6 tape and reel
contents STL8N6LF6AG 2 / 14 docid028068 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 5 3 test circuits ................................ ................................ ..................... 7 4 package information ................................ ................................ ....... 8 4.1 powerflat? 5x6 wf type r package information .......................... 8 4.2 p owerflat? 5x6 wf packing information ................................ .... 11 5 revision history ................................ ................................ ............ 13
STL8N6LF6AG electrical ratings docid028068 rev 2 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 60 v v gs gate - source voltage 20 v i d drain current (continuous) at t case = 25 c 32 a drain current (continuous) at t case = 100 c 23 i d (1) drain current (continuous) at t pcb = 25 c 9.6 a drain current (continuous) at t pcb = 100 c 6.8 i dm (1) (2) drain current (pulsed) 38 a i dm (2) drain current (pulsed) 128 a p tot total dissipation at t case = 25 c 55 w p tot total dissipation at t pcb = 25 c 4.8 t stg storage temperature - 55 to 175 c t j operating junction temperature notes: (1) when mounted on a 1 - inch2 fr - 4, 2 oz copper board, t < 10 s. (2) pulse width is limited by safe operating area. table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case 2.7 c/w r thj - pcb (1) thermal resistance junction - pcb 31.3 notes: (1) when mounted on a 1 - inch2 fr - 4, 2 oz copper board, t < 10 s. table 4: avalanche characteristics symbol parameter value unit i av avalanche current, not repetitive 32 a e as (1) single pulse avalanche energy 120 mj notes: (1) starting t j = 25 c, i d = i av , v dd = 43.5 v.
electrical characteristics STL8N6LF6AG 4 / 14 docid028068 rev 2 2 electrical characteristics (t case = 25 c unless otherwise specified) table 5: static symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 250 a 60 v i dss zero gate voltage drain current v gs = 0 v, v ds = 60 v 1 a i gss gate - body leakage current v ds = 0 v, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 2.5 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 9.6 a 21 27 m v gs = 4.5 v, i d = 9.6 a 25 31 table 6: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 1340 - pf c oss output capacitance - 90 - c rss reverse transfer capacitance - 60 - q g total gate charge v dd = 30 v, i d = 9.6 a, v gs = 10 v (see figure 14: "test circuit for gate charge behavior" ) - 27 - nc q gs gate - source charge - 4.6 - q gd gate - drain charge - 4.3 - table 7: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 30 v, i d = 12.5 a r g = 4.7 , v gs = 10 v (see figure 13: "test circuit for resistive load switching times" and figure 18: "switching time waveform" ) - 9.6 - ns t r rise time - 20 - t d(off) turn - off delay time - 56 - t f fall time - 7 - table 8: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 9.6 a i sdm (1) source - drain current (pulsed) - 38 a v sd (2) forward on voltage v gs = 0 v, i sd = 9.6 a - 1.3 v t rr reverse recovery time i sd = 25 a, di/dt = 100 a/s, v dd = 48 v (see figure 15: "test circuit for inductive load switching and diode recovery times" ) - 22.5 ns q rr reverse recovery charge - 22.2 nc i rrm reverse recovery current - 2.0 a notes: (1) pulse width is limited by safe operating area. (2) pulse test: pulse duration = 300 s, duty cycle 1.5%.
STL8N6LF6AG electrical characteristics docid028068 rev 2 5 / 14 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
electrical characteristics STL8N6LF6AG 6 / 14 docid028068 rev 2 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalize d on - resistance vs temperature figure 11 : normalized v(br)dss vs temperature figure 12 : source - drain diode forward characteristics
STL8N6LF6AG test circuits docid028068 rev 2 7 / 14 3 test circuits figure 13 : test circuit for resistive load switching times figure 14 : test circuit for gate charge behavior figure 15 : test circuit for inductive load switching and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
package information STL8N6LF6AG 8 / 14 docid028068 rev 2 4 package information in order to meet environmental requirements, st offers these devices in different grades of eco pack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat? 5x6 wf type r package information figure 19 : powerflat? 5x6 wf type r package outline a0y5_8231817_r_wf_rev_12
STL8N6LF6AG package information docid028068 rev 2 9 / 14 table 9: powerflat? 5x6 wf type r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 c 5.80 6.00 6.20 d 5.00 5.20 5.40 d2 4.15 4.45 d3 4.05 4.20 4.35 d4 4.80 5.0 5.20 d5 0.25 0.4 0.55 d6 0.15 0.3 0.45 e 1.27 e 6.20 6.40 6.60 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 e6 0.175 0.325 0.450 e7 0.85 1.00 1.15 k 1.275 1.575 l 0.725 0.825 0.925 l1 0.175 0.275 0.375 ? 0 12
package information STL8N6LF6AG 10 / 14 docid028068 rev 2 figure 20 : powerflat? 5x6 recommended footprint (dimensions are in mm) 8231817_footprint_r12
STL8N6LF6AG package information docid028068 rev 2 11 / 14 4.2 powerflat? 5x6 wf packing information figure 21 : powerflat? 5x6 wf tape figure 22 : powerflat? 5x6 package orientation in carrier tape
package information STL8N6LF6AG 12 / 14 docid028068 rev 2 figure 23 : powerflat? 5x6 reel
STL8N6LF6AG revision history docid028068 rev 2 13 / 14 5 revision history table 10: document revision history date revision changes 06 - jul - 2015 1 first release. 07 - jan - 2016 2 updated title and features in cover page. updated section 1: "electrical ratings" , section 2: "electrical characteristics" and section 4.1: "powerflat? 5x6 w f type r package information" .
STL8N6LF6AG 14 / 14 docid028068 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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